The present invention relates to multi-layer circuit boards. In particular, the invention relates to improved electrical interconnections for circuit board layers of a multi-layer circuit board, and to a method of making those interconnections.
Multi-layer printed circuit boards are known in the art, and are used to make complex electrical circuits. (As used herein, a circuit board consists of a pattern of conductive traces which are used to interconnect electric components. The conductive traces are bonded to or otherwise incorporated into an insulating substrate which mechanically supports the components. This includes single and double sided boards, multi layer constructions, hybrids, multi-chip modules, chip on board assemblies and the like. The conductive traces may be formed using any number of techniques, for example electroplating, etching, sputtering, mechanical attachment using adhesives and others. The substrate can be flexible or rigid and can be fabricated of any suitable material, for example polymers, ceramics, glasses, silicon etc.) Electrical connections between components of the electrical circuits are provided on the circuit board layers of the multi-layer circuit board. Using multiple circuit board layers allows the circuit designer to lay out complex circuit designs using many components in which those components require numerous interconnections. Multi-layer circuit boards increase component density and functionality per unit volume.
Each circuit board layer of a multi-layer circuit board carries electrical connections, or electrical traces, which act as wires and are used to interconnect the various components of the circuit. Electrical connection between adjacent circuit board layers is achieved using "vias." A via is created by forming a hole between adjacent layers. The hole is filled with conductive material to form an electrical connection between the two adjacent layers.
Typically in printed circuit board (PCB) fabrication (otherwise known as printed wiring board or plated through hole technology), the electrical traces are formed separately on each layer of the multi layer circuit board. The circuit board layers of the multi-layer circuit board are then stacked and aligned to each other with an electrically insulating bonding layer between adjacent layers. The assembled layers are then subjected to heat and pressure to provide a bond between adjacent layers. Via holes are then drilled in the appropriate locations which interconnect pads on successive layers. The electrical interconnect is achieved by applying a conductive material to the side walls of the via holes. The prior art requires the metal via contact pads to have sufficient area on the circuit board to accommodate the drill cross section and/or any misalignment. These large pad areas limit the component density of the circuit board. To form buried vias additional processing is required. Namely, the above structure is treated as a sub-assembly several of which can be laminated together to form the full board.
The advent of semiconductor processing and advanced materials has permitted the fabrication of circuit boards on a much finer scale than the printed circuit boards described above. Examples of these include hybrids, multi-chip modules (MCMs) and the like. Typically, MCMs are manufactured in small numbers of aerospace, military and supercomputer applications. An example would be MCM-Ds. The D refers to deposition where a circuit is built up upon an inorganic non-conducting substrate using thin film approaches with copper or aluminum traces and organic or inorganic dielectrics. Using these technologies a multi layer circuit is built up by a sequential process. This technology is capable of fabricating very fine lines and vias (blind, stacked, and buried) resulting in very much higher circuit densities than traditional plated through hole technology described above. However, this increased density comes at the cost of much more expensive processing which is usually accomplished in sequential batch processing. Batch processing does not lend itself to high volume production and the sequential fabrication results in lower yield as the deposition of one defective layer ruins an entire part.
U.S. Pat. No. 5,046,238 issued Sep. 10, 1991 to Daigle et al. entitled METHOD OF MANUFACTURING A MULTILAYER CIRCUIT BOARD describes a method for providing interconnections between layers of a multi-layer circuit board and is hereby incorporated by reference. The technology is practiced using fluoropolymers which are expensive and are traditionally difficult to process. Processing difficulties include adhesion problems and the requirement of high temperatures for processing laminates (700.degree. F. and above). In addition, the process is practiced in batch form which is not easily amendable to high volume production.